Apple’s Platform Architecture group develops the next generation of Apple hardware, and the tools to make it possible. Our team builds high-performance verification systems that accelerate the development of Apple silicon. We aim to push the boundaries of pre-silicon validation with simulation solutions that apply and extend principles from hardware emulation.
We are seeking an engineer to develop and deploy agentic AI workflows that automate and optimize pre-silicon validation processes. In this role, you will bridge the gap between applied artificial intelligence and Electronic Design Automation (EDA), building autonomous agents that triage errors, tune simulation parameters, and drastically reduce maintenance burdens for silicon verification teams.
Description
In this role, you will focus on AI based automations, infrastructure development, and continuous experimentation at the intersection of hardware design and verification.
Minimum Qualifications
Bachelor’s degree in Computer Science, Electrical Engineering, Machine Learning, or a related field (or equivalent practical experience).
Experience in one of the following two areas: Applied AI (experience building, deploying, and maintaining LLM-based applications, agentic workflows, or advanced prompt engineering, combined with an entry-level familiarity with EDA tools or hardware verification concepts), or EDA/Silicon (experience with RTL design, simulation, or hardware emulation platforms, combined with a demonstrated track record of working in research-oriented roles applying software automation or ML to hardware problems).
Experience with scripting, infrastructure development, and software engineering (e.g., Python, C/C++).
Preferred Qualifications
Master’s in Computer Science, Electrical Engineering, or a related AI/Hardware field.
10+ years of relevant industry experience.
Hands-on experience with Design Verification tasks requiring application of EDA tools, including Logic Equivalence Checking (LEC), linting / static analysis tools, waveform debugging, and simulation / emulation flows.
Familiarity with Verilog, SystemVerilog, or architecting HDL testbenches for functional verification.
Experience developing software tools for co-simulating designs across multiple high-performance platforms.
Comfortable exploring unfamiliar codebases, researching cutting-edge techniques, and rapidly prototyping automated solutions.
Experience applying research methods: literature review, data-driven experimentation, analyzing results.
Strong communication skills, with the ability to collaborate effectively with cross-functional silicon engineering, design verification, and EDA development teams.
