The FBHUB (Frame Buffer HUB) Shanghai team focuses on memory subsystem IP design and verification, contributing to FBHUB RTL development, verification infrastructure, coverage analysis, and performance validation. We collaborate closely with the Santa Clara FBHUB team to drive quality assurance and accelerate project execution across multiple GPU roadmap milestones. Our work encompasses verification methodology development, regression management, and design validation, with a commitment to delivering robust memory interconnect solutions for next-generation GPU architectures.
What you’ll be doing:
The responsibility includes verification on FBHUB end-to-end functionality, performance and power optimization, etc.
Different verification methodologies are embraced (RTL based simulation and/or formal verification) to speed-up the working progress in a high efficiency way.
Participate in the research of verification methodology to improve automation and productivity to produce NVIDIA's new high-quality state of the art products.
Deploy the advanced verification methodology and infrastructure of the IP/SOC.
What we need to see:
4+ years work experience
Bachelor's (BS) or Master's (MS) degree in Electrical Engineering, Computer Engineering, or related fields.
Familiar with verification methodology, tools, and flow.
Programming skills in System Verilog, Python/Perl, and C/C++.
Ways to stand out from the crowd:
Fully experienced verification flow: Know the typical milestones and the related verification action and release
Ability to use proper metrics to present and monitor verification status
Complex TB setup experience and skills below: SVA, functional coverage group, random constraint, etc.
AI coding tools experience, such as Cursor.
Good English communication skills.
NVIDIA is widely considered one of the technology world’s most desirable employers. We have some of the most brilliant and talented people working for us. If you're creative and autonomous, we want to hear from you!
