Location Options: Sunnyvale, Toronto, or Vancouver
About the Role
We are seeking a Compiler Engineer to help design and implement new features in our low-level compiler toolchain including the compiler mid-end, backend, assembler, and linker targeting individual cores in this unique architecture. You’ll work primarily within the LLVM infrastructure, developing code generation and optimization strategies for both existing and future architectures.
This role focuses on generating highly optimized single-core code, foundational to scaling performance across our massively parallel system.
Responsibilities
- Design and implement low-level compiler components (compiler backend, assembler, linker) targeting single cores.
- Automate generation of new LLVM targets using high-level architecture description
- Identify and develop novel LLVM mid-end and backend passes that leverage architectural features and optimize code generation for performance, including memory usage, instruction scheduling, and register allocation.
- Analyze performance bottlenecks and iterate on codegen strategies for complex workloads.
- Work closely with hardware architects, kernel developers, and high-level language designers to ensure end-to-end performance.
- Participate in technical reviews, design discussions, and collaborative debugging.
Requirements
- Bachelor’s, Master’s, PhD, or foreign equivalents in computer science, engineering, or related field
- Strong hands-on experience with LLVM, particularly in backend code generation.
- Two or more years of related work experience on compilers/toolchain development or systems programming
- Strong proficiency in C++, especially modern C++ practices.
- Deep understanding of computer architecture, instruction sets, and memory models.
- Familiarity with linkers, assemblers, and binary formats.
Preferred
- Exposure to AI/ML workloads and compilers (MLIR, XLA, TVM, etc.).
- Understanding of multi-dimensional data representations and vectorized operations.